Synchronization of Subthreshold-cmos Chaotic Oscillators

This paper reports on the design and chip measurements from synchronous coupled chaotic oscillators operating in subthreshold CMOS. Each uncoupled oscillator is autonomous and generates chaotic signals with three state variables. For commensurate bandwidth, the subthreshold designs utilize currents and capacitors over 200 times smaller than above threshold realizations. The reduced size makes such designs suitable for single-chip VLSI synthesis of circuit topologies that promote chaotic synchronization. Here, we present both asynchronous and synchronous chaotic data from a fabricated chip to demonstrate the viability of subthreshold CMOS for the spatially distributed design of high-order nonlinear systems.